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Thread: MicroPDP-11 - some questions

  1. #91

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    Quote Originally Posted by commodorejohn View Post
    Hmm. I kinda figured it meant that the baud rates could be selected in code (I'd have to reexamine the manual, though.) My MXV11 doesn't come with a console panel that includes a rate selector, anyway (though my KDF11 CPU does - not sure if it would affect anything.)
    I used a standard 11/23 panel with the selector. I just tried and it ignored baud rate selection on the panel. The manual is kind of hard to follow. I wonder if you put it to the software selection the ROM sets the baud rate or it's more to disable the software that is running from changing it. If it's the ROM the diag ones must set it to 9600. Although, there are so many jumpers on these things who knows anything for sure. Anyone want to trade a KDJ11B for a KDJ11A and MXV11B ?

  2. #92
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    The MXV11-B was intended to be used with BC21B cables. The BA23 console connection board with the baud rate switch has its own baud rate clock on it and replaces the baud rate clock on a board it's plugged into. Studying the print set will reveal this.

    The console connection is the left (components facing you, fingers down) connection on a MXV11-B. There are many jumpers that have to be set correctly. I studied the manual and determined the right jumpering. Trial and error will not work, there are too many jumpers.

    Lou

  3. #93

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    The manual actually has a good flow chart for setting the jumpers. Of course, you have to understand what the things are. What does a BC21B cable look like ? I can't find a picture.

    Quote Originally Posted by Lou - N2MIY View Post
    The MXV11-B was intended to be used with BC21B cables. The BA23 console connection board with the baud rate switch has its own baud rate clock on it and replaces the baud rate clock on a board it's plugged into. Studying the print set will reveal this.

    The console connection is the left (components facing you, fingers down) connection on a MXV11-B. There are many jumpers that have to be set correctly. I studied the manual and determined the right jumpering. Trial and error will not work, there are too many jumpers.

    Lou

  4. #94
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    BC21B has a ten position female header connector on one end and a DB25M wired DTE (as it should be) on the other.

    I pulled out my MXV11-B2 out of the test backplane. Below I have listed all the jumper positions. I have it configured to attempt to boot, then to drop to the boot menu if that fails. The console (CSR 177560 Vector 60) connection is on J2 (SLU1) (left with components facing you and fingers down) 38,400 baud and J1 (SLU0) (CSR 176500 Vector 300) 9600 baud for the serial line printer or TU58. Roms are 145 and 146.

    J3 to J4 (halt processor on console break)
    J8 to J9 to J10 (console SLU 38400 baud, SLU 0 9600 baud)
    J16 to J17 (enable roms)
    J19 to J20 (4k/8k roms)
    J26 to J27 (disable on-board LTC [my backplane provides BEVENT])
    J36 to J37 (Q22)
    J44 to J45 (bootable roms present)
    J47 to J48 (master clock - must always be in)
    J49 to J50 to J51 (8k roms)
    J61 to J62 (set SLU1 to console)

    Lou

    Quote Originally Posted by mc68010 View Post
    The manual actually has a good flow chart for setting the jumpers. Of course, you have to understand what the things are. What does a BC21B cable look like ? I can't find a picture.

  5. #95

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    So out of curiousity, I've generally seen clock speeds for the LSI-11 models given in the 10+ MHz range. The Wikipedia article on the J-11 chipset, for instance, says that it was eventually pushed up to 19 MHz. However, when trying to find a comparable value for the F-11 chipset (in order to compare my 11/23 as it was to the 11/73 it is now,) I found this site, which lists speeds for the J-11 as 3.75 MHz and eventually up to 4.75 MHz. Is that correct? If so, I presume that it uses a four-phase clock like the TMS-99xx chips I was confused about in another thread, and Wikipedia is just listing the input clock rate. What is the advantage to a four-phase clock, anyway?
    Power Mac G4 (OS9/OSX.4, 200GB HD, 2GB RAM, PPC 7455 @ 2x1.25GHz)
    Amiga 1200 (KS3.1/ClassicWB3.1, 4GB HD, 34MB RAM, 68030 @ 50MHz)
    DEC MicroPDP-11/73 (RT-11, 32MB HD, 4MB RAM, KDJ11 @ 3.75MHz)

    "'Legacy code' often differs from its suggested alternative by actually working and scaling." - Bjarne Stroustrup

  6. #96

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    Quote Originally Posted by commodorejohn View Post
    ...I found this site, which lists speeds for the J-11 as 3.75 MHz and eventually up to 4.75 MHz. Is that correct? ...
    The site at that link appears to suffer from "translation difficulties".

    • The DEC original published DCJ11 CPU manual lists "67ns min" [~15mhz] as the attainable "CLK cycle time" [Appendix B-2].


    It's difficult to infer their intent reliably, but the article at your link appears to be incorrectly using the terms "Clock rate", "Core Frequency" and "Microcycle" times interchangeably. These are completely different, often incongruous concepts when applied to older machines.

    Perhaps that will help clear things up?

  7. #97

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    A little bit. I see from the "Instruction Timing" appendix, though, that instructions are timed in "microcycles," which are equal to four CLK cycles, so I'm thinking that 3.75 MHz is closer to the mark than 15 MHz.

    I realize, of course, that clock speed is only meaningful when comparing two speeds on a similar microarchitecture, I was just curious.
    Power Mac G4 (OS9/OSX.4, 200GB HD, 2GB RAM, PPC 7455 @ 2x1.25GHz)
    Amiga 1200 (KS3.1/ClassicWB3.1, 4GB HD, 34MB RAM, 68030 @ 50MHz)
    DEC MicroPDP-11/73 (RT-11, 32MB HD, 4MB RAM, KDJ11 @ 3.75MHz)

    "'Legacy code' often differs from its suggested alternative by actually working and scaling." - Bjarne Stroustrup

  8. #98

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    If you're trying to appreciate relative "processing power", it's easiest to do within a family of "like" machines.

    However, applying MIPS to these machines can be misleading once you cross the boundary into other manufacturer's architectures. Even DEC tended to understate the capability of an 11/70 when making comparisons to VAX11/780.

    Such an architectural misalignment could result in a factor of 2-5 for a given comparison.

    I've heard it said that an 11/70 with PEP70 memory and enhanced CACHE [offered by the same manufacturer] could attain ~5 MIPS sustained.

    DEC in general estimated their 11/84 as being slightly higher performance than the 11/70 - and the 84 had a J11 based CPU with an 18mhz clock.''

    However those comparisons don't reflect the actual usefulness when the architectures are considered in a given application. An 11/70 performing a program compile for example, was always assumed to be doing so on a disk drive that was UDA50 connected. An 11/70 was a MASSBUS machine, and if the tests were repeated on this basis, it actually outstripped the 11/780. [which is why DEC stopped making that comparison]

    Similarly, CPU instruction rates would need to take into account what computations were being performed, whether a floating point accelerator was present and beneficial, before approaching any meaningful answer.

    In RAW terms, 4 clocks per microcycle, 2-4 microcycles per instruction would give a more or less correct impression of a ~1 MIP machine when talking about a J11 @ 15mhz clock. This assumes memory latency is not an issue, and that CACHE was reasonably effective.


    Remember too, we're talking about a 16-bit ALU with integer math and multiply / divide instructions. (exclude Floating Point - which is much more cloudy)

    Is that a useful yardstick?

  9. #99

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    MIPS may not be a perfect measure of processor speed, but it is better than nothing which is what replaced it.

  10. #100

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    It's good enough. Again, I'm not trying to come up with precise benchmarks, I was just kinda curious. The thing I'm not really clear on is that the KDF11 manual shows execution times that are vastly longer for the same instructions, if they're using the same definition of "microcycles," which it looks like they are. (40 microcycles versus 14 for CLRD mode 0, for example!) So evidently there was a major improvement in microcode efficiency between the KDF11 and the DCJ11, even without the increased clock speed and cache (again, if I'm reading this correctly!)

    Edit: I was looking at the floating-point instruction table. Integer/control instructions show a less consistently drastic difference, but still notable.
    Last edited by commodorejohn; October 11th, 2012 at 03:01 PM.
    Power Mac G4 (OS9/OSX.4, 200GB HD, 2GB RAM, PPC 7455 @ 2x1.25GHz)
    Amiga 1200 (KS3.1/ClassicWB3.1, 4GB HD, 34MB RAM, 68030 @ 50MHz)
    DEC MicroPDP-11/73 (RT-11, 32MB HD, 4MB RAM, KDJ11 @ 3.75MHz)

    "'Legacy code' often differs from its suggested alternative by actually working and scaling." - Bjarne Stroustrup

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